??? 07/06/11 06:12 Modified: 07/06/11 09:04 Read: times |
#182809 - Totally missing the point Responding to: ???'s previous message |
Richard Erlacher said:
... serial memory ... certainly had both commands/status to/from the device and data from master to/from slave. IIRC, it had to be told on which edge to operate as well But that has nothing to do with SPI itself - that is entirely specified by the slave in question. it certainly wasn't like communicating with one or more '595 or '597 registers SPI is just communicating with shift registers - nothing more! Look again at the diagram on the Wikipedia page that you cited: (for a read-only or write-only connection, the MOSI or MISO connection can be omitted) It is just shift registers - there is nothing required that is not also required to use "discrete" shift registers. Of course, if you were building a memory interface with "discrete" shift registers, you would still have to define your clock phasing (the SPI "mode"), and some "protocol" for reading the memory, writing the memory, and specifying the address(es) at which to read/write. I simply don't see the advantage of using SPI The advantage is that it is very widely used, so there is loads of support available. There is no significant burden or disadvantage. |