Note that many JTAG solutions are better than just boundary scan.

There is a general move away from ICE solutions, and the chip manufacturers are instead adding a debug block inside the processors, to allow the JTAG interface to not just perform boundary scan, but to also allow more or less intelligent breakpoints and possibly tracing. Some processors also complements the standard JTAG with special trace pins, to allow you to record the executed instructions.

I'm not sure what the exact state is for Atmel AVR chips with JTAG interface. I do have their JTAG ICE mkII but have only used it will smaller chips that are using their one-wire debug interface.

The big difference between a JTAG interface and using a monitor software is that the JTAG allows single-stepping from the first instruction, and can debug most situtations where the chip locks up. And you can use the full flash size for the application program. The debug block in the processor allows breakpoints in the flash address range, without reprogramming the flash with any magic sw instructions.