??? 07/24/09 23:43 Read: times |
#167851 - Elaboration Responding to: ???'s previous message |
Hi Rob,
Ehm, surely you mean the inductance? No. I meant impedance, the complex quantity Z = R + i(X_j - X_c). It is intuitively obvious, without the benefit of calculation, that the capacitive reactance component of the impedance in the plane becomes precipitously greater the farther one gets from the trace. In order to make the same point with the inductive reactance component of the impedance, one must show that the same formulae which calculate the inductance of the trace relative to the ground plane apply to the inductance of the plane relative to the trace. Given the nature of inductance, that is not so intuitively obvious. In the meantime I stand by my original statement. If you're concerned with external interference getting into your board, putting the signal traces on the inner layers can be very effective. And yes, even on SMT boards. Of course, that presumes you know where to route your traces. Joe |
Topic | Author | Date |
PCB design - ground plate... | 01/01/70 00:00 | |
excuse... | 01/01/70 00:00 | |
You can use a local ground plane, but... | 01/01/70 00:00 | |
So, if I understand it well... | 01/01/70 00:00 | |
Yes, of course, but... | 01/01/70 00:00 | |
Yes, but... | 01/01/70 00:00 | |
No overlap | 01/01/70 00:00 | |
Version B, but without FB... | 01/01/70 00:00 | |
so... | 01/01/70 00:00 | |
PCB layout... | 01/01/70 00:00 | |
Answers... | 01/01/70 00:00 | |
EMC | 01/01/70 00:00 | |
Hhm, I wouldn't do that... | 01/01/70 00:00 | |
AC power supply | 01/01/70 00:00 | |
ground vias | 01/01/70 00:00 | |
Locating of vias... | 01/01/70 00:00 | |
Thank you very much... | 01/01/70 00:00 | |
Sideplating? Thermal vias? | 01/01/70 00:00 | |
Stackup | 01/01/70 00:00 | |
Not such a good idea | 01/01/70 00:00 | |
interrupted/split planes | 01/01/70 00:00 | |
Elaboration | 01/01/70 00:00 | |
Thank you... | 01/01/70 00:00 | |
Nice link, Rob! | 01/01/70 00:00 | |
Elaboration | 01/01/70 00:00 | |
Explanation | 01/01/70 00:00 | |
Elaboration | 01/01/70 00:00 | |
What you propose isn't well suited for 4 layer boards | 01/01/70 00:00 | |
Hi Kai![]() | 01/01/70 00:00 |