| ??? 07/23/09 19:28 Read: times |
#167769 - Elaboration Responding to: ???'s previous message |
Hi Rob,
That is a very nice link. And the part about the return path of currents is spot on. It's pretty intuitive if you calculate the impedance (the capacitance in particular) of the ground plane relative to the signal trace. This is the very reason it's always crucial to be extremely careful when splitting a ground plane (e.g. digital v analog regions). If a trace passes over a discontinuity in the plane, it experiences an abrupt increase in impedance and becomes a slotted antenna. Now please explain to me what difference it makes which is on top. Joe |
| Topic | Author | Date |
| PCB design - ground plate... | 01/01/70 00:00 | |
| excuse... | 01/01/70 00:00 | |
| You can use a local ground plane, but... | 01/01/70 00:00 | |
| So, if I understand it well... | 01/01/70 00:00 | |
| Yes, of course, but... | 01/01/70 00:00 | |
| Yes, but... | 01/01/70 00:00 | |
| No overlap | 01/01/70 00:00 | |
| Version B, but without FB... | 01/01/70 00:00 | |
| so... | 01/01/70 00:00 | |
| PCB layout... | 01/01/70 00:00 | |
| Answers... | 01/01/70 00:00 | |
| EMC | 01/01/70 00:00 | |
| Hhm, I wouldn't do that... | 01/01/70 00:00 | |
| AC power supply | 01/01/70 00:00 | |
| ground vias | 01/01/70 00:00 | |
| Locating of vias... | 01/01/70 00:00 | |
| Thank you very much... | 01/01/70 00:00 | |
| Sideplating? Thermal vias? | 01/01/70 00:00 | |
| Stackup | 01/01/70 00:00 | |
| Not such a good idea | 01/01/70 00:00 | |
| interrupted/split planes | 01/01/70 00:00 | |
| Elaboration | 01/01/70 00:00 | |
| Thank you... | 01/01/70 00:00 | |
| Nice link, Rob! | 01/01/70 00:00 | |
| Elaboration | 01/01/70 00:00 | |
| Explanation | 01/01/70 00:00 | |
| Elaboration | 01/01/70 00:00 | |
| What you propose isn't well suited for 4 layer boards | 01/01/70 00:00 | |
Hi Kai | 01/01/70 00:00 |