??? 03/03/09 22:01 Read: times |
#163037 - That's probably correct, but ... Responding to: ???'s previous message |
The dual data pointers with automatic increment/decrement, and automatic alternation between them, if you want/need it, is not something I'd expect to see on an ARM anytime soon.
Execution of an instruction that takes data from here and places it there, both in external memory, in 60 ns with optional incrementation/decrementation of the pointer to source and the pointer to destination is not something I'd expect to see on an ARM MCU anytime soon either. Some of the ARM CPU's I've used have been capable of 100 MIPS and more, but most things you want to do take more than one instruction. While that's not tragic, it does interfere with the resolution to which one can sample an input. I do see the handwriting on the wall, though, and would expect the ARM to take over the MCU market, though probably not within my lifetime. I'm no stranger to changing MCU families, since I've painstakingly avoided MCU's and CPU's with positive resets and positive interrupts. I'm just now fiddling with the 805x's because I always liked their instruction set. I was, at one time, a strong proponent of Intel 8048-family MCU's, but they had a negative reset. I'm not convinced that HLL's help much with the business of programming the sorts of functions with which I routinely work, namely data transfers, sometimes with translation, since much of that is dependent on the features of the MCU and on precise timing which only ASM will produce. There are some things, however, that will likely cause 'C' and other HLL's to cough, for example moving an array from external XRAM to internal XRAM at the same physical address. I can't imagine am elegant way to do that in any HLL since it requires the pointers to have the same value and I'd expect the compiler to complain. RE |