critical paths are not discussed in any detail and its taught in college courses as if you can just string a few logic packages together then your design will magicaly work without having to worry about such things.

I once redid some software that actually made a $250.000 piece of equipment perform no better than its $100.000 'little brother" due to "properly designed" software. I succeeded in making the equipment perform at hardware speed, rather than being software limited. This made a bug appear which was, of course, blamed on me. A very sharp hardware engineer and the undersigned 'univesalist' then spent more than a month chasing this 'once a day' glitch blamed on my software. Finally we put the scope away and 'scoped by reason'. After poring over schematics, writing in minimum and maximum prop delays we eventually reasoned that it could be a pulse too narrow for the scope to show (this was before the storage scope was a standard tool) appearing at point x. Replacing a gate with another brand 'fixed' the problem. When we approached the 'designer' his reply was very similar to what Jez posted and, in addition blabbering about 'typical' values. I often wish that the chip manufacturers would omit the 'typ' column from the datasheets, they have done enough damage when fools design by them.

Erik

PS "properly designed" used fastidiously above ment thing such as calculating addresses every time they were used, rather than storing them at startup for quick access.