| ??? 06/14/06 00:12 Read: times |
#118250 - VHDL vs Verilog Responding to: ???'s previous message |
Erik Malund said:
those of you that get EE Times will have seen the survey that did show that System Verilog and Verilog will have more users next year while VHDL will have fewer. Ya know, these surveys come out all the time, and my usual response is: who cares? They've been talking about SystemVerilog for five or six years, and it's still theoretical. The same people keep talking about SystemC, which is more overloaded silliness. I don't think either VHDL or Verilog are going away anytime soon. As for VHDL vs Verilog, I speak both, and each has things the other lacks. I prefer VHDL because the emacs VHDL mode is a Thing Of Beauty. -a |
