The concept of interrupts on x86 (and PC) is quite different from '51.
Basically, the x86 has only one hardware interrupt source^* - an external interrupt - but when it comes active, the interrupting hardware submits the processor an interrupt vector.
To "expand" the number of interrupt lines, in PC a controller is used (in fact, 2 controllers; nowadays integrated in what is called the chipsed). The IRQ lines from ISA bus are fed into this controller, which resolves interrupts enabled/disabled, priorities and a couple of other things, then pulls the single interrupt leg of the processor and tells it the appropriate interrupt vector. For the programmer it means, that he has to program the interrupt controller (it is IO mapped) - enable the interrupt and when it occurs, at the end of ISR reenable it (acknowledge the interrupt); and he has to insert his ISR routines' address into the interrupt vectors table.

A good tutorial on the topic:
http://www.beyondlogic.org/interrupts/interupt.htm

Have fun!

Jan Waclawek

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* there are also "software interrupts" - in fact, quick calls to predetermined table - and interrupts caused by program execution exceptions (e.g. division by 0)