I was think about using a video buffer like the Averlogic AL422 or AL440.... these are like a "dual port" SRAM but with clocked addressing. These things are 50MHZ / 80MHz.

http://www.averlogic.com/dualport_...type=FIFOs

Their correct label is "Video Frame Buffer"

You write the data slowly on one side (8051)... and clock it out fast on the other side. Vsynch and Hsynch still need to be generated some how.

It was only ever a concept but quite feasable.

Obviously a FPGA can have dual port SRAM inside and generate the HSYNC and Vsynch signals... and they are quite a few app notes from Altera and Xilinx.


Joe