??? 12/09/10 16:53 Read: times |
#180035 - ... but if we dig deeper to the datasheets... Responding to: ???'s previous message |
Christoph Franck said: Indeed; nevertheless this is also the case in all microcontrollers I know, i.e. the interrupt enable is multi-level, and the lower-level (individual-interrupt-source-level) enables are all disabled by default. Yet the global interrupt is disabled, too.
... the reset value of PRIMASK is indeed zero and exceptions with configurable priority are not globally disabled after reset.
However, all interrupts should be disabled at the NVIC level after reset, since the reset value of SETENA is also zero. I'd say ARM violated the "least surprise" principle here, or they are simply ignorant, or... Christoph Franck said: ... this would indeed provide a valid answer to the "why", would those "faults-which-are-exceptions-but-not-interrupts" be enabled by default after reset (i.e. software would not need to enable it "manually". This appears to be not the case. According to my books, they are throttled by bits 0, 1, 3, 7, 10 and 11 of register SHCSR, which, according to the . I believe this would be the case with the other sources, too... leaving us with the Cortex-M3 TRM is reset to 0, all those exceptions disabled.
Note that PRIMASK refers to exceptions, which are not limited to interrupts (i.e. they also include things like memory management faults, bus faults, etc, which the user may want to be able to handle even directly after reset). Jan |
Topic | Author | Date |
[ARM] Default state of interrupts | 01/01/70 00:00 | |
Normally vectorized interrupt controller | 01/01/70 00:00 | |
but isn't this the case with ALL microcontrollers? | 01/01/70 00:00 | |
Often three layers of enable | 01/01/70 00:00 | |
This is the case here (LPC17xx)... | 01/01/70 00:00 | |
May vary a lot | 01/01/70 00:00 | |
Not the case anymore for Cortex-M3s. | 01/01/70 00:00 | |
Startup code? | 01/01/70 00:00 | |
not startup code, but the after-reset state | 01/01/70 00:00 | |
Hw-acceleration | 01/01/70 00:00 | |
According to the datasheet of my CM3 ... | 01/01/70 00:00 | |
... but if we dig deeper to the datasheets... | 01/01/70 00:00 |