??? 12/07/10 16:25 Read: times |
#179957 - [ARM] Default state of interrupts |
From my previous experience with 8- and 16-bit MCUs I assumed that there is an agreement that interrupts shall be globally disabled after reset.
Now it appears that this is not the case with ARMs, or at least the Cortex-M3s. I wrote an interrupt service routine and enabled a particular (timer) interrupt; inadvertently hit the "compile and download" key and to my big surprise, voila, the expected behaviour, without writing an explicit __enable_irq(). I tried to decipher the disassembled source but can't find anything which would be of that effect. When I write explicitly __disable_irq(), the application freezes as expected. I am a bit lost in the overall logic of the various documents, just deducing that the register in question is PRIMASK (more precisely its bit 0), for which the manuals (in various words) state, that 1 disables "normal" interrupts and that the reset state is 0. That would confirm my findings, namely that interrupts are "enabled globally" after reset. Comments? Jan Waclawek |
Topic | Author | Date |
[ARM] Default state of interrupts | 01/01/70 00:00 | |
Normally vectorized interrupt controller | 01/01/70 00:00 | |
but isn't this the case with ALL microcontrollers? | 01/01/70 00:00 | |
Often three layers of enable | 01/01/70 00:00 | |
This is the case here (LPC17xx)... | 01/01/70 00:00 | |
May vary a lot | 01/01/70 00:00 | |
Not the case anymore for Cortex-M3s. | 01/01/70 00:00 | |
Startup code? | 01/01/70 00:00 | |
not startup code, but the after-reset state | 01/01/70 00:00 | |
Hw-acceleration | 01/01/70 00:00 | |
According to the datasheet of my CM3 ... | 01/01/70 00:00 | |
... but if we dig deeper to the datasheets... | 01/01/70 00:00 |