When creating a logic chip tester/identifier, the sky is the limit. It can be simple or complex. Some cheap improvements can greatly improve the testing abilities while some tests on the other hand may require a lot of extra hardware.

If designing a tester/identifier, I would most probably create a virtual test platform where a PC program could be connected to a virtual subject under test, for playing around with the test vectors, and figure out how well a specific test vector prunes the possibilities.

Such a test jig could be run with all test vectors run on all supported chips while scoring each individual rule based on outcome.

That would allow the rule set to be reordered based on how many steps that are needed to reject # chips.

So the outcome would not be a 200 individual sets of test vectors but instead an optimized tree where the outcome of each test vector selects which subtree to continue with until finally ending with zero, one or multiple matching chips.

Zero chips could mean that the logic chip is broken. Or of an unknown type. Or that the chip was incorretly placed in ZIF socket. Or that the user gave wrong instructions to the tester - such that claiming that the chip to test was a 16-pin chip with VCC at pin 16 and GND at 8, when it actually was a 14-pin chip wih VCC at pin 14 and GND at pin 7.

Multiple matching chips is possible if the hardware isn't able to separate some parameter between two chips. Such as a 4xxx chip with identical logic function and pinout as a 74xx chip and the hw or test vectors don't support the testing for existence of schmitt-trigger inputs or approximate input logic levels or the voltages of logic-high/logic-low of outputs.

Having a PC application simulate a large number of logic chips while trying out the test vectors could also suggest suitable pins on the ZIF socket that would be good to get extra electronics, such as ADC or DAC capabilities.

A few well-placed ADC-connected pins could be able to detect output logic levels for a large percentage of supported test subjects.

A few well-placed DAC-connected pins could be able to detect schmitt-trigger inputs and chips having CMOS or TTL-level logic input levels.

As noted earlier, the 74xx and 4xxx families have a huge number of chips. But most of them are very uncommon, so it might be meaningful to create an IC tester that has some limitations for more uncommon chips. Another thing is that an automatic tester with some limitations may be designed to support manual intervention to break ties - for example by requesting the user to manually connect an ADC output to a specific pin on the ZIF socket just verify CMOS or TTL logic output levels.

Someone who wants to make a really cool tester could add a high-frequency oscillator allowing a square wave to be sent through a gate and mixing it using an XOR gate with undelayed square wave data. Combining the two signals and low-pass-filter the result would give an analog value that depends on gate delay times allowing a tester to make guesses between 7400, 74LS00, 74ALS00, 74HC00.

Another possible improvement is to design a tester that can measure amount of current drawn on VCC, potentially checking both supply current with unloaded outputs and with an output forcibly held low or high.

I'm not sure how many people really need a good IC identifier/tester, but a lot of things can be down for a very low cost and this could be a very good school project since there are so many possibilities for creativity. After all, it's only by trying different things that we learn. Practical work is normally far better than just theory to make us pick up new knowledge and remember it.