??? 02/13/08 06:11 Modified: 02/13/08 06:18 Read: times |
#150695 - you have no id... Prove your rants then Responding to: ???'s previous message |
Erik Malund said:
we have ZERO failures after the one or two bad joints on one or two of the boards in a lot have been fixed. I think that over ~5000 boards I have seen ONE defective semiconductor. Now, at one time it was much worse, but after installing antistatic measures we achieved the above. You must not be having ISO 9000 quality management systems if the defect arises due to antistatic measures . I didnot talked about bad joint , if I do talk about em you can have plenty of defective boards. I said after testing which includes plenty of tests. Erik Malund said:
You have no idea, do you? the wear leveling algorithm is applied to flash where there is a finite number of erases possible, that is not 'wear' that is flash technology. I talked about memory didnt I . Again as you use the memory in the name of technology again and again it does wear . why you claim such things Malund .I had a notion that you are a seasoned person , but should I keep that notion afterreading this ? Erik Malund said:
explanattion for your rants about 'wear' Erik And you didnt rant that the device will not fail if worked in the specified limits didnt you? . Prove it how many times can you drive load via port pin high to low (you can use the said parameter in the datasheet), take for example AT89C51 and give us the data regarding the failure rates ,for or your claim . I have stated earlier and please listen to it again when you operate within the specified limits the device does have failure rates caused by succesive use which may lead to final breakdown , which you dont agree . AP PS : When I ask for proving things ... I dont get replies ha hah ha . I dont care |