| ??? 11/25/07 18:03 Read: times |
#147379 - I didn't simulate it (yet) Responding to: ???'s previous message |
David said:
Did you try simulating that...? It won't put a|b on the output when both selectA and selectB are high. If a = ~b then it will get confused b/c you're trying to assign w to two different values. Indeed. I put together that pathological example on purpose to see exactly how/if the tools would resolve the confusion. As noted, the synthesizer generated logic that does in fact put a|b on the output when both selectA and selectB are high. I didn't think to simulate it, however. That should be equally enlightening. Thanks for the tip! You don't want to have two assign statements for the same wire. Supposing that the chip did offer internal tristate buffers, wouldn't that be the way to code the first circuit shown here? -- Russ |
| Topic | Author | Date |
| Tri-state busses in FPGAs | 01/01/70 00:00 | |
| Tristate Buffers (TBUFs) have been phased out | 01/01/70 00:00 | |
| Thank you | 01/01/70 00:00 | |
| Closing the loop | 01/01/70 00:00 | |
| siumulate? | 01/01/70 00:00 | |
| I didn't simulate it (yet) | 01/01/70 00:00 | |
| hmmm | 01/01/70 00:00 | |
| So ... what about a BIG multi-party bus? | 01/01/70 00:00 | |
| delay | 01/01/70 00:00 | |
| nevertheless ... | 01/01/70 00:00 | |
| re: nevertheless | 01/01/70 00:00 | |
| What disappoints me is the advertising vs reality | 01/01/70 00:00 | |
| advertising | 01/01/70 00:00 | |
| advertising, badvertising ... lies! | 01/01/70 00:00 | |
| oy | 01/01/70 00:00 | |
If only one could rely on them ... | 01/01/70 00:00 | |
| largely, it's because it's not an option | 01/01/70 00:00 | |
| Zackly | 01/01/70 00:00 | |
| If you have internal tristate resources ... | 01/01/70 00:00 | |
| I have new worries now | 01/01/70 00:00 | |
| tristates in FPGAs | 01/01/70 00:00 |