(note: you don't make a plural out of FPGA by adding 's.]



Do you mean: what tools are used to do the design, or what tools are used to download designs into the devices?



Anything and everything. Limited only by your imagination!

Having said that, certain apps are better done in FPGAs and some are better done with a microprocessor. Of course, one can embed a processor in an FPGA, or buy an FPGA with a processor hard core.



You MUST understand digital design. FPGA design is NOT the same as writing software or firmware. If you don't "think hardware," your designs will suck. You must understand synchronous logic and static timing analysis.

(off soapbox)



You start with a fabric of flip-flops and combinatorial logic (called a macrocell or a slice) with lots of routing resources available to connect the logic.



Not necessarily! Unless you're making tens of thousands of units, the FPGA may be cheaper.



One describes--and simulates!!!--the logic in VHDL (or Verilog, or to a much lesser extent, by drawing schematics). You then use a synthesis tool to translate the HDL to the logic primitives used in the target chip family, and then you use place and route tools to place the logic cells in the fabric in an optimal way, and then route the connections between the logic and the I/O. You then program either the device itself (if a CPLD or certain FPGA families) or an EEPROM (for most FPGAs) using a JTAG download cable.



a) ModelSim is a simulation tool. It is not a synthesis tool, nor does it do place and route. You use it to simulate your logic, and you can also use it to simulate placed-and-routed designs to see if problems arise due to timing. However, most FPGA guys (myself included) rarely bother with post-route timing simulation, as the static timing analysis tells you whether your design meets your timing constraints.

For all intents and purposes, ModelSim is vendor independent. However, all of the FPGA vendors provide libraries one can use to simulate their primitives. For example, if you use a Xilinx clock DLL in a design, you can simulate it using a Xilinx library.

b) I assume that when you say, ACCEL, you mean ACCEL-EDA, which has been P-CAD for about six years, and it's worth noting that P-CAD 2006 is the end of the line for that product family (Altium has finally decided that they don't need three distinct layout program lines). I think most of the P-PCAD/Protel support for FPGAs is in the area of importing FPGA constraint files into the layout tool to simplify dealing with FPGAs that have hundreds of pins. You'll still need to use the vendor place and route tools. For beginners using FPGAs, don't even worry about this.

-a