| ??? 02/22/06 15:00 Read: times |
#110494 - Pull-downs create problems Responding to: ???'s previous message |
Suresh said:
Can i know how, the source impedence could be maintained low, so that the port pin could fall to logic low state. Assume you want to connect a simple switch to a port. Now you have at least two options: 1. Using the switch in combination with a pull-up resistor, while the switch connects the port line to ground when being activated. In this case the source impedance seen by port when inputting logic low state is almost zero. No problems occur. 2. Using the switch in combination with a pull-down resistor, while the switch connects the port line to supply voltage of micro when being activated. In this case the source impedance seen by port when inputting logic low state is identical to the pull-down resistance. And if this is bigger than about 3kOhm, from our example, then problems will occur!! So, all interfacing techniques using rather high pull-downs should be avoided with the quasi-bidirectional topology. Kai |
| Topic | Author | Date |
| AT89s52 Port pin clarifications: | 01/01/70 00:00 | |
| nice copy, where is the question | 01/01/70 00:00 | |
| output characteristics | 01/01/70 00:00 | |
| most confusing post | 01/01/70 00:00 | |
| Answers | 01/01/70 00:00 | |
| Logic 1 to 0 transition | 01/01/70 00:00 | |
| You haven't read the 'bible' chapter... | 01/01/70 00:00 | |
| no details about transition from logic 1 | 01/01/70 00:00 | |
| other way 'round | 01/01/70 00:00 | |
| There ARE!! | 01/01/70 00:00 | |
| pFET2 | 01/01/70 00:00 | |
| Weak and very weak pull-ups | 01/01/70 00:00 | |
| maintaining low source impedence? | 01/01/70 00:00 | |
| by making thje driver a sink............ | 01/01/70 00:00 | |
| Pull-downs create problems | 01/01/70 00:00 | |
| Maximum IOL per port pin: 10 mA ? | 01/01/70 00:00 | |
| IOL | 01/01/70 00:00 | |
| IOL = 10mA or 1.6mA? in port 1 | 01/01/70 00:00 | |
Depends on load | 01/01/70 00:00 |