??? 02/16/06 09:14 Read: times |
#110130 - AT89s52 Port pin clarifications: |
Hello Everyone,
I would like to check the correctness and also clarify on the details i have mentioned here regarding the port pins of AT89S52 for effective programming. Initially all ports of AT89S52 are high. 1)a VOL = Output Low Voltage (Ports 1,2,3) = 0.45 V at each pin At this condition, sink current (IOL) = 1.6 mA at each pin port pin in this mode is used to switch 'ON' a PNP Tr example code: clr p1.x 1)b VOL1 = Output Low Voltage(1) (Port 0, ALE, PSEN) = .45 V at each pin At this condition Sink current (IOL) = 3.2 mA at each pin port pin in this mode is used to switch 'ON' a PNP Tr example code: clr p1.x 2)a VOH = Output High Voltage (Ports 1,2,3, ALE, PSEN) at different source current ratings: source current (IOH) = -60 µA, VCC = 5V ± 10%. VOH = 2.4 V source current (IOH) = -25 µA VOH = 0.75 VCC source current (IOH) = -10 µA VOH = 0.9 VCC Port pin in this mode is used to switch 'ON' NPN tr. Eg code: setB p1.x Doubt: This shows different o/p high voltage rating. i need to know what does this signify in connecting a Transistor(NPN) to it. Can this negative current drive the NPN transistors with presence of external pullups. 2)b VOH1 Output High Voltage (Port 0 in External Bus Mode) at different source current ratings: Source current (IOH) = -800 µA, VCC = 5V ± 10% VOH = 2.4 V Source current (IoH) = -300 µA VOH = 0.75 VCC Source current (IOH) = -80 µA VOH = 0.9 VCC same Doubt as in 2)a 3) Logical 0 Input Current(IIL) (Ports 1,2,3) = -50 µA when VIN = 0.45V I would like to know what the above statement describes, having described the source and sink currents in 1 & 2. 4) Logical 1 to 0 Transition Current(ITL) (Ports 1,2,3) = -650 µA when VIN = 2V, VCC = 5V ± 10% HOw this should be taken care of while connecting the driver circuit to the port. Thanking you all, -suresh. |
Topic | Author | Date |
AT89s52 Port pin clarifications: | 01/01/70 00:00 | |
nice copy, where is the question | 01/01/70 00:00 | |
output characteristics | 01/01/70 00:00 | |
most confusing post | 01/01/70 00:00 | |
Answers | 01/01/70 00:00 | |
Logic 1 to 0 transition | 01/01/70 00:00 | |
You haven't read the 'bible' chapter... | 01/01/70 00:00 | |
no details about transition from logic 1 | 01/01/70 00:00 | |
other way 'round | 01/01/70 00:00 | |
There ARE!! | 01/01/70 00:00 | |
pFET2 | 01/01/70 00:00 | |
Weak and very weak pull-ups | 01/01/70 00:00 | |
maintaining low source impedence? | 01/01/70 00:00 | |
by making thje driver a sink............ | 01/01/70 00:00 | |
Pull-downs create problems | 01/01/70 00:00 | |
Maximum IOL per port pin: 10 mA ? | 01/01/70 00:00 | |
IOL | 01/01/70 00:00 | |
IOL = 10mA or 1.6mA? in port 1 | 01/01/70 00:00 | |
Depends on load | 01/01/70 00:00 |