| ??? 02/18/06 13:54 Modified: 02/18/06 13:57 Read: times |
#110269 - There ARE!! Responding to: ???'s previous message |
Suresh said:
i went through the Bible (Chapter - Hardware Description) but couldn't find enough description regarding the transient conditions (from logic 1 to 0)in port(1,2,3). THERE ARE ENOUGH DETAILS, but you must also think a bit!! Read the chapters "Writing to a Port", "Port Loading and Interfacing" and have a look at figure 5 of this 'bible' chapter: http://www.semiconductors.philips.com/acrobat_d...WARE_1.pdf Think about what happens, if the input inverter skips, when input voltage sinks to less than about 2V. Which pull-up turns-off then? Which pull-up still delivers current? Why does the current flowing out of the port pin decreases from about 650µA to only about 50µA? Supporting questions: What potential needs a PMOS-FET at gate to turn-on? What needs a NMOS-FET? Kai |
| Topic | Author | Date |
| AT89s52 Port pin clarifications: | 01/01/70 00:00 | |
| nice copy, where is the question | 01/01/70 00:00 | |
| output characteristics | 01/01/70 00:00 | |
| most confusing post | 01/01/70 00:00 | |
| Answers | 01/01/70 00:00 | |
| Logic 1 to 0 transition | 01/01/70 00:00 | |
| You haven't read the 'bible' chapter... | 01/01/70 00:00 | |
| no details about transition from logic 1 | 01/01/70 00:00 | |
| other way 'round | 01/01/70 00:00 | |
| There ARE!! | 01/01/70 00:00 | |
| pFET2 | 01/01/70 00:00 | |
| Weak and very weak pull-ups | 01/01/70 00:00 | |
| maintaining low source impedence? | 01/01/70 00:00 | |
| by making thje driver a sink............ | 01/01/70 00:00 | |
| Pull-downs create problems | 01/01/70 00:00 | |
| Maximum IOL per port pin: 10 mA ? | 01/01/70 00:00 | |
| IOL | 01/01/70 00:00 | |
| IOL = 10mA or 1.6mA? in port 1 | 01/01/70 00:00 | |
Depends on load | 01/01/70 00:00 |