| ??? 02/29/12 23:05 Modified: 02/29/12 23:09 Read: times |
#186303 - Boring... Responding to: ???'s previous message |
Richard said:
What, exactly, is it that you find boring about using a simple, though long-established method for solving this relatively trivial problem? A PLL with wide capture range can easily deal with this problem, and, as others have already stated, it only takes a coupld of IC's and a few cheap passives requiring perhaps 3 square centimeters of PCB space. It can even be done with one CMOS IC, e.g. one of the MC14515x or 14517x series frequency synthesizers. Well, PLL looks simple at first moment, but to make it work properly can be boringly tricky. To find the right loop filter providing fast settling time, low ringing and low jitter, all at the same time, can be tedious. Then there is this phase comparator issue. And so on. I remember very well an application when I had a nasty jitter. It turned out, that there was an unwanted coupling between the phase comparator and the VCO within the CD4046 due to ground bounce. Equally what loop filter I took this damned jitter appeared and ruined my signal. Finally I had two independent CD4046 on the board, from the one I used the phase comparator and from the other the VCO. And the jitter took a powder... Kai Klaas |
