Yes, I know that solution. However, I don’t want to use Low-Active Design.
then, I know of no micro you can use. Any micro known to me will be either high or 'open' ("input") on power up. and, since 'open' match "cold solder" that will not satisfy you.

When I/O pin is logic-1. Due to cold solder, PNP transistor’s Base pin will be logic-0 and RELAY ACTIVE… (Who can warrant that such an event won’t happen.)
the transistor that drives the relay may short (Who can warrant that such an event won’t happen.)
the the relay contacts may 'weld' (Who can warrant that such an event won’t happen.)

BTW if the connection to the PNP base is open the PNP will not conduct and RELAY INACTIVE.

Low-Active design is not secure for that kind of circuits.
as above, no design is secure. The only difference is where the insecurity comes from.

In other way, I can be passed up power-on port situation in data sheet. But this mean is not “ATMEL true”. I think ATMEL must have done selectable internal pull-up resistors.
they may in certain derivatives but not in the "plain vanilla"

also, how will "selectable internal pull-up resistors" help you?

If there is not software solution,
If ATMEL won’t do selectable internal pull-up resistors,
If ATMEL won’t solve that very easy problem,
I doubt very much that Atmel - or any other micro manufacturer - will modify their designs to satisfy you.

I think you are making excuses for not having read the datasheet before you designed.

Erik