??? 06/26/13 00:56 Read: times Msg Score: +1 +1 Informative |
#189960 - debugging embedded processors Responding to: ???'s previous message |
Richard Erlacher said:
I'm really curious how one should approach the situation wherein one has to debug what's going on in the code while interacting with the custom logic. OK, I've done the Xilinx EDK with both MicroBlaze softcore and PowerPC hardcore, and I'm finishing up an Actel design which has an embedded 8051 soft core. In all cases, the processor cores have debug capability (single-step, variable watch, everything you expect), and the vendors provide firmware debug tools which talk to that debug core over JTAG. It works. -a |
Topic | Author | Date |
OCD for FPGA core | 01/01/70 00:00 | |
Serial-to-EC2 reverse engineering | 01/01/70 00:00 | |
C2spec.pdf | 01/01/70 00:00 | |
Reality Check...... | 01/01/70 00:00 | |
Agreed | 01/01/70 00:00 | |
multi-threaded | 01/01/70 00:00 | |
FPGA and soft cores | 01/01/70 00:00 | |
Yes ... but which debugger? | 01/01/70 00:00 | |
Actually no | 01/01/70 00:00 | |
Who's "they" | 01/01/70 00:00 | |
I wouldn't use FPGA unless I need more than just the core | 01/01/70 00:00 | |
FPGA on-chip debugging redundant? | 01/01/70 00:00 | |
debugging embedded processors | 01/01/70 00:00 | |
That's good to know. | 01/01/70 00:00 | |
nice idea | 01/01/70 00:00 | |
Von Neumann first | 01/01/70 00:00 | |
if that were the case ... | 01/01/70 00:00 | |
Poorly chosen acronym... | 01/01/70 00:00 | |
On Chip Debug is common | 01/01/70 00:00 | |
On Chip Debug *is* a very good idea indeed! | 01/01/70 00:00 | |
PC | 01/01/70 00:00 | |
PC | 01/01/70 00:00 | |
PC | 01/01/70 00:00 |