??? 06/04/13 18:48 Read: times |
#189856 - Who's "they" Responding to: ???'s previous message |
That's quite different from what I've encountered.
Now, perhaps you're at a different level of debug than what I'm imagining, but even when using commercial chips, few debuggers support all the features of your design. In a "roll-yer-own" situation you've got the JTAG support for your programmable logic, and little else. In a device large enough to house even a fairly simple 805x-core, that's a lot of stuff to debug. Keeping track of all the details, especially timing, will be quite a challenge. RE |
Topic | Author | Date |
OCD for FPGA core | 01/01/70 00:00 | |
Serial-to-EC2 reverse engineering | 01/01/70 00:00 | |
C2spec.pdf | 01/01/70 00:00 | |
Reality Check...... | 01/01/70 00:00 | |
Agreed | 01/01/70 00:00 | |
multi-threaded | 01/01/70 00:00 | |
FPGA and soft cores | 01/01/70 00:00 | |
Yes ... but which debugger? | 01/01/70 00:00 | |
Actually no | 01/01/70 00:00 | |
Who's "they" | 01/01/70 00:00 | |
I wouldn't use FPGA unless I need more than just the core | 01/01/70 00:00 | |
FPGA on-chip debugging redundant? | 01/01/70 00:00 | |
debugging embedded processors | 01/01/70 00:00 | |
That's good to know. | 01/01/70 00:00 | |
nice idea | 01/01/70 00:00 | |
Von Neumann first | 01/01/70 00:00 | |
if that were the case ... | 01/01/70 00:00 | |
Poorly chosen acronym... | 01/01/70 00:00 | |
On Chip Debug is common | 01/01/70 00:00 | |
On Chip Debug *is* a very good idea indeed! | 01/01/70 00:00 | |
PC | 01/01/70 00:00 | |
PC | 01/01/70 00:00 | |
PC | 01/01/70 00:00 |