You're absolutely right in that a change in the current flow from Vled to GND is more likely to generate EMI and ground bounce. However, Mahmood's issue apparently is with his clock, and noise on his clock can certainly create undesired effects as well. His circuitry is undoubtedly designed to minimize the noise effects directly caused by his LED array. However, simple current limiting at the current sink can mitigate that. Further, selective clocking, e.g. segregating the various displays and their drivers by using separate clocks offers some beneficial effects. Separately clocking the output register will ensure that the displays don't "update" at the same time, hence, will mitigate the current demand from loading the output register.

If, however, his issue is with a noise-corrupted clock, the very likely source of clocking problems is reflections on the clock itself, which will be mitigated by slew-rate limiting.

Slowing the edges on the clock at the source while monitoring the clock at the destination will reveal the relative effectiveness of his filtering.

Lowering the impedance of the clock line will increase its immunity to any externally induced noise.

Shielding will protect the clock from externally induced effects if it has a relatively long path, particularly if that path is in a cable. If such cabling includes the power supply connections, he'd probably be well-advised to make the power travel by a separate route. If there are multiple connections involved in the cabling in which the clock is transmitted, it would be advisable to clamp the clock to Vdd and Vss with schottky diodes in order to suppress overshoot and the all-too-common ringing that results from the edges of the reflections those discontinuities bring about.

The benefit of each of these schemes is readily observable, so, presumably, Mahmood will take a look and see which of these efforts has the desired effect. While it's likely they'll all offer some benefit, if he starts with the simplest-to-implement and lowest-cost ones, he can see where he stands.

As I've said before, there's no point in allowing the perfect to be the enemy of the satisfactory. Long-term thorough testing will reveal when the thoroughly adequate level has been reached. Engineering is, after all, a matter of compromise.

RE