??? 12/01/08 18:21 Read: times |
#160461 - What I injected was potential failure modes ... Responding to: ???'s previous message |
in http://www.8052.com/forumchat/read/160392 Richard Erlacher said:
I've recently encountered one 805x circuit with a 1000 uF cap on its Vcc rail, that had unidentified problems which were initially called "reset" issues. By removing the 1000 uF electrolytic cap, I made the problem "disappear" though I'm not yet sure why. .. . The point was that there are consequences of vastly overloading the Vcc line with capacitance, in this case, by 100x, other than the inherent risk to the voltage regulator. This is common with underdesigned power supplies. In such cases, when one "turns off" the feeder supply, it may indeed drop out, but that can reverse-bias the regulator, which can cause harm. In such cases, it may take a minute or more for the Vcc level to drop do where all the circuitry "knows" it has been shut down. If, during that slow decay, the feeder supply is restored, as one unaware of this consequence might do in the lab, the system might fail to reset properly, whether there's a supervisor present or not. I carefully avoided mentioning that fact in the cited post. It is, nonetheless, the case that underdesigning the power supply and attempting to compensate for it with lots of capacitance on the regulated Vcc, is a mistake commonly made by novices. On every device datasheet there should be a worst-case power supply current. The power supply should be able to provide that amount of current, plus the instantaneous charge current of the sum of all the load capacitance presented by the capacitors on the Vcc rail, multiplied by a reasonable factor of safety, say, 1.25, without any trouble and fully within its normal operating limits. Clever system designers often include negative-tempco resistors in the input to their final regulator stage in order to limit that instantaneous current demand. This requires some thinking, however, so most board designers skip it. The change I initially made was to remove that 1000 uF cap. The result was that the capacitance was reduced to 10 uF + 100 nf per IC. Once that was done, no failures were observed over a lengthy series of cycle tests of several units. I've learned "the hard way" that capacitance, like garlic, can be overdone. I'd point out that my action was not a "fix." The problem, as yet uncharacterized, simply retreated into obscurity. Some people think that this is enough. I am not among them, however. In this case, the problem in question was not properly characterized at the outset. That makes a "fix" hard to identify. My client was satisfied with the result, the fellow who designed the circuit and who asserted the probable cause was RESET-related was fired, and balance was restored, at least in part, to the universe. That, of course, is why staff engineers hate to have consultants brought in. RE |