??? 02/02/07 19:19 Read: times |
#131937 - why no "FPGA integration" Responding to: ???'s previous message |
Caslav Nedeljkovic said:
And a little side-topic: In the original thread I've received answer from Andy (thanks) which raised a few more questions so to start with one...
We don't use the autorouter, nor the FPGA integration (why don't they sell CAD packages WITHOUT the FPGA stuff). Altium has a whole blurb about their FPGA features. They provide some IP blocks and a simulation tool, neither of which are useful to me. Regarding the former: I really hate the idea of "pull a counter module from the library," which to me smacks of instantiating 74xx parts in the VHDL! Often I find things like counters end up embedded in a state machine. I do try to create useful modules (like a whole UART or an SPI interface or whatever). Here's an example: there are a whole bunch of VHDL and Verilog code for SDRAM interfaces out there. I've put SDRAM interfaces into a handful of designs, and it turns out that each was written basically from scratch and I've never been able to use, say, the Xilinx example. Why? Because the back-end -- the thing you're interfacing to -- was different in each case, and the glue required to make things fit got ugly. It's just easier to re-do the interface so it matches the back end. You end up with a smaller and faster design, too. Regarding the latter, the simulation (or emulation) tool: I use ModelSim with VHDL (or Verilog) test-benches. I don't need another simulation engine, especially one that's vendor-dependent. My test benches will work with any HDL simulation tool. Also, I don't like the "draw the input and watch the outputs wiggle" kind of simulation as it's pointless. My testbenches include simulation models of the things my FPGA talks to. So if my FPGA put a DMA engine and an SDRAM interface onto the PCI bus, then my test bench includes a PCI bus model and the SDRAM. Altium says (http://www.altium.com/Evaluate/...elopment/) that "Altium calls this process LiveDesign, and it allows you to rapidly develop FPGA-based applications without the need for HDL-based simulation." That's a fool's errand, also called "Burn And Crash." Yes, comprehensive test benches take time to write. But it beats the hell out of sitting in the lab with a 'scope and a logic analyzer and constantly re-running the tools to bring test points out to FPGA pins. So, anyways, a PCB vendor's FPGA tool is useful for newbies, but all the pro needs is emacs, ModelSim and the FPGA vendor fitter tools. I will say that the ability of the PCB tool to import FPGA pin assignments is waaay cool. -a |
Topic | Author | Date |
Layout tool choice (and a bit of VHDL) | 01/01/70 00:00 | |
Tutorials/examples in the manual | 01/01/70 00:00 | |
Manual is informative | 01/01/70 00:00 | |
Collars and cuffs | 01/01/70 00:00 | |
Still runnung around | 01/01/70 00:00 | |
If you don't own it, ... | 01/01/70 00:00 | |
Stopped working? | 01/01/70 00:00 | |
why no "FPGA integration" | 01/01/70 00:00 | |
clearly generic ip blocks are pretty useless | 01/01/70 00:00 | |
Agree | 01/01/70 00:00 | |
Fun ? | 01/01/70 00:00 | |
Thanks for advice | 01/01/70 00:00 | |
this is about beginning - where do you want to end | 01/01/70 00:00 | |
It's sometimes hard to predict :) | 01/01/70 00:00 |