0234 D2 AE
check the datasheet, if the ES1 bit is IE.6, you are good.
scan your TOTAL code for IP, EA, ES1 just to see if there is some overlooked change

I wonder whether this is a priority problem. My program never writes to the IP register or any of its bits. This register is supposed to be initialised to zero on reset, which means that interrupts will use their "natural priority". Is this correct?
If so this means that serial port 0 can interrupt the serial port 1 interrupt handler but not the reverse.
NO, absolutely NOT, it means that if RI0/TI0 and RI1/TI1 are active at the same time UART0 get priority. UART0 can not interrupt a UART1 ISR unless IP is set.
probably the most common misumderstanding is the "simultaneous priorities", read the section in "the bible" again (sometimes it take 3 or more times to get it)

From reading the User Guide I conclude that the programmer has no direct control over the priority level that the processor is running at.
not except the IP register

It will automatically change to the priority level of the interrupt when it vectors to the handler (meaning that it can only be interrupted by a higher priority interrupt), and it will automatically return to the previous priority level when the RETI is executed. Is this correct?
I would say no, but think it is that I do not understand what you mean.

Erik