The "setb CLK" at the "pr1:" label may do two different things, depending on the previous state of CLK: if CLK was previously 1 (as it is after reset), it won't produce a riding edge on the clock; if CLK was previously 0 (as it is after calling these routines) it will.

I would rewrite it in the following way (pseudo-code):

- init CLK to low
- pulse the LD pin
- loop:
  - read in QH to C, rotate it into ACC
  - set CLK high
  - delay
  - set CLK low
  - repeat loop 8x
 

etc.

JW