| ??? 05/17/12 13:07 Read: times |
#187398 - neither do I Responding to: ???'s previous message |
The problem with the above, is it is right on the limit of design, I'm having to overclock the Mega and I don't like to do that.
neither do I, there is no way to KNOW it works (fully/always). Hae you considered the SILabs 8051f120 runnong 1 clock at 100MHz? or you could, of course, switch to an ARN Erik |
| Topic | Author | Date |
| 256bit x 8 proms | 01/01/70 00:00 | |
| What frequency Sine wave & Clock ? | 01/01/70 00:00 | |
| Thank you | 01/01/70 00:00 | |
| DDS (Direct Digital Synthesis) | 01/01/70 00:00 | |
| digital sine wave | 01/01/70 00:00 | |
| uC sine generator | 01/01/70 00:00 | |
| DMA | 01/01/70 00:00 | |
| neither do I | 01/01/70 00:00 | |
| ARN | 01/01/70 00:00 | |
| 'F120 Series | 01/01/70 00:00 | |
| Other solutions | 01/01/70 00:00 | |
| 150nS access time is so long | 01/01/70 00:00 | |
| is that realy the case? | 01/01/70 00:00 | |
| Of course my solution | 01/01/70 00:00 | |
| Hmmm.., nice but... | 01/01/70 00:00 | |
| Those are actually PALs not CPLDs | 01/01/70 00:00 | |
| ATF750CL for PT clocks | 01/01/70 00:00 | |
| ATF750 | 01/01/70 00:00 | |
| ATF750C ? | 01/01/70 00:00 | |
| Yes, Jim You are exactly right. | 01/01/70 00:00 | |
| Can I suggest | 01/01/70 00:00 | |
| ATDH1150USB | 01/01/70 00:00 | |
| Update : ATDH1150VPC | 01/01/70 00:00 | |
Thanks JIM | 01/01/70 00:00 |