Nathan:

It would surely be possible to steer the 17th address bit (A16) by using the PSEN/. You could effectively divide the FLASH part into two 64K byte address spaces. One would be used for code and the other as external memory. Some care in design would have to be done because the OE/ signal from the RAM would need to be driven for both the RD/ and the PSEN/ signals despite the A16 manipulation. You would have to carefully study address setup and hold times at the FLASH to make sure that the chip gets valid signaling to run a correct cycle. After all an A16 derived from PSEN/ will arrive at the FLASH much later than the address bits from the MCU or those latched via the ALE signal.

I would like to suggest that it will not be too useful to generally fill your complete XRAM data space up with FLASH. FLASH chips should generally be considered to be mostly read-only. Whilst they can be written it takes a special block oriented algorithm to load data out into FLASH. This is slow and works entirely different from a functionally standpoint than some RAM that one would normally expect to find in the external RAM data space that supports fully random order access for both reading and writing. There are indeed some applications that can benefit from an XDATA are filled up with a whole bank of read-only data but not most applications. So you should consider to build out the external RAM space with some RAM there. One scheme may be to segment the XDATA space with 32K of RAM at say 0x0000 to 0x7FFF and then map XRAM part your FLASH part into the 0x8000 to 0xFFFF part of the 64K space allocated to the XDATA area. You could still play the A16 game with the PSEN/ but at the same time play a game with the A15 line from some port bit being used as a FLASH 32K bank select.

Michael Karas