| ??? 10/26/08 17:05 Read: times |
#159367 - Master is easy, slave is pure hell Responding to: ???'s previous message |
The nice thing is that a SPI master is trivial to implement. An SPI slave is evilishly hard to implement.
How fast can the chips run SPI? With a little bit of luck, you will manage with very little delays, so you can busy-loop the communication without significant loss of processor time. |
| Topic | Author | Date |
| SPI is a free for all ?? | 01/01/70 00:00 | |
| Danger to use block sizes not n*8 bits | 01/01/70 00:00 | |
| The non-standard, standard | 01/01/70 00:00 | |
| Master is easy, slave is pure hell | 01/01/70 00:00 | |
| control by chip select | 01/01/70 00:00 | |
| Correct | 01/01/70 00:00 | |
| Now you know why Philips (now NXP) ... | 01/01/70 00:00 | |
| Yes. | 01/01/70 00:00 | |
| What was the incompatibility? | 01/01/70 00:00 | |
| Instruction length. | 01/01/70 00:00 | |
| Bad knowledge of that EEPROM manufacturer | 01/01/70 00:00 | |
| Oh the irony. | 01/01/70 00:00 | |
| No Analogue Irony At All | 01/01/70 00:00 | |
| I have company.. | 01/01/70 00:00 | |
| Your T7 | 01/01/70 00:00 | |
| Simple interpretation | 01/01/70 00:00 | |
| FTDI | 01/01/70 00:00 | |
I have company | 01/01/70 00:00 |