Richard:

Do you take me for an idiot? I find that your response is extremely disappointing. It means either that you have not read and understood my postings or you have no first hand experience with the type of circuit configuration being talked about. Either way, if you pass this one off with some type of brush off or lame excuse then it will be you who gives the appearance of being foolish.

Just to show you that I know what I am talking about and that the comments made in my previous postings are correct I searched out a Spice Model for a logic level N-FET that I could plug into LT-Spice to shine further light on this discussion. The part I decided to show was the Vishay (formerly Siliconix) SiA414DJ N-Channel MOSFET. The data sheet is linked from here: SiA414DJ Data Sheet. Please look this up. You will have to agree that in terms of a "logic level FET" this one fits the bill.

Just to recall the circuit configuration view the following diagram of the LT-Spice simulation circuit. Here the target MCU is connected into the source circuit of the N-FET to achieve a switching circuit like Koosha showed in his first post of this thread.



In the above circuit the gate of the N-FET is driven all the way to the +5V supply.

Now look at the waveform plot of the simulation circuit as shown below. The top panel shows the gate drive voltage pulse to 5V and also the voltage at the source of the N-FET which would also be the VDD of a target MCU that was being power switched in this circuit configuration. The lower panel shows the current waveform for the current in the load resistor which is meant to simulate the target MCU.



Now please tell me if this is a suitable voltage to provide to the VDD of the 5V target MCU?

The appropriate way to switch the VDD to the target MCU in this type of high side switch configuration is with a P-FET. Vishay has the SiA413DJ device which would do right nicely.

Michael Karas