The PC parallel port, may it rest in peace, has, since 1989 or so, supported Enhanced Parallel Port mode (EPP) under IEEE standard 1284.

It's a relatively high-bandwidth mode, requiring that the PC automatically generate address strobe and data strobe when the port base +3 is accessed for address information and port base+(4..7) for data. The hardware interprets accesses to address base+(4..7) as being written sequentially to base+4, hence produces sequential byte accesses to the same port, with a separate strobe for each byte.

I realize that there was a brief, though inconclusive and uninformative thread about this, apparently because everyone was curious but hadn't yet done it. I'm curious, myself, whether anyone has gotten around to doing anything with EPP mode in the meantime?

RE