For a compiler (writer) it depends on some circumstances. If the cpu has interrupts and the compiler can generate ISR's, it has to support callee-saves anyway (unless the cpu can switch context easily like e.g. the 8051 or z80). So you could go callee-saves all-the-way. But callee-saves also means you cannot pass parameters by registers.

So just like always it is a trade-off.

FYI: SDCC can handle both (it's an option) but defaults to caller-saves and only that is regression tested on a daily basis.