I didn't say that they don't know what they're doing. I didn't mean to say that anyway, but I did imply that they hadn't taken a few vital steps ... yet.

If they attempt to simulate the T51 core without their CAN controller, they'll have a chance to see how certain instructions work. That, in turn, should show them how the external memory interface works as opposed to internal memory and SFR-space. I'm not persuaded that they have enough knowledge of the 805x architecture and instruction set to make them fully aware of the interaction of those instructions with that architecture.

Christian made specific reference to a signal that is key in generating the external memory strobes and steering the multiplexer. He seemingly expected to write a control bit rather than using external-memory-specific instructions.

To me, it makes much more sense to follow the example of the UART and counter/timers provided in the core, rather than "plowing up new ground" as using external-memory-space would be. Note that I've exhorted them to simulate an attempt to access external data memory space. That, I believe, will be very instructive.

RE