??? 12/09/17 02:39 Read: times |
#190825 - Old School SRAM Memory Expansion Responding to: ???'s previous message |
I'm thinking now that in the rest of the circuit, the SRAM address lines are all tied to TTL 74LSxx chips powered by +5v (rather than Vmem). So perhaps the switch upper position should be tied to +5v too. That way Axx (the highes addr line, that I am using for bank switching) will be at 0v when power is off, regardless of the switch position. For instance,
.------U------- +5v---. Vmem---| Vcc | | | | < | < 1k | SRAM < | | SPDT | /--------| Axx (highest addr line) | | | | < | < 10k | < | | === GND = This means that in standby, Axx is always at 0v. Also, there is this knowledge base item: https://community.cypress.com/docs/DOC-10268 |
Topic | Author | Date |
Old School SRAM Memory Expansion | 01/01/70 00:00 | |
Old School SRAM Memory Expansion | 01/01/70 00:00 | |
maybe this isn't the easiest way ... | 01/01/70 00:00 | |
Banked SRAM | 01/01/70 00:00 | |
maybe a peek at the SRAM datasheet would help | 01/01/70 00:00 | |
Suited pull-ups / pull-downs do the trick... | 01/01/70 00:00 | |
Thanks! | 01/01/70 00:00 |