Didn't you read Erik's post?

If the input pin has a diode to Vcc, that diode will conduct when the pin voltage reaches Vcc + Vf of the diode. If there isn't some external current limiting resistor, the current in through the pin can get high enough that it destroys the chip.

The datasheet for the processors don't always tell if there is such a diode, in which case you can't just connect 5V to a pin of a processor powered by 3.3V, (or 7V to a pin of a processor powered by 5V). Adding a suitable resistor in series, you will be able to see if there is a diode in the chip, in which case the pin voltage will just raise with Vf and the rest of the over-voltage (Vin - Vcc - Vf) will be over the resistor. If there isn't a diode that shorts the overvoltage to Vcc, then there will be almost no voltage loss over the resistor, and the processor pin voltage will rise to match the input voltage.

A problem here is that all chips are not designed equal, and that also includes their behaviour when held in reset. Some processors supports this "trick" after the I/O pin has been correctly initialized, but may clip to Vcc + Vf when in reset, in which case there must be a current-limiting resistor always fitted. Some other processors will also in the reset state have the pin 5V-tolerant without the need of a current-limiting resistor. An ARM chip I worked with claimed in the datasheet that the pins were 5V-tolerant (3.3V Vcc) and later got an errata note that some of the pins needed a current-limiting resistor.