??? 11/07/08 05:41 Read: times |
#159875 - What would be the advantage? Responding to: ???'s previous message |
... of wolf in sheep's clothing?
If I want an ARM, I use an ARM, and if I want an 805x, what I look for is a one-clocker that isn't totally twisted and can access external memory at the internal bus rate. I occasionally need more address lines, but I can generate them externally. If you want to build a BIG 805x, put a REAL PLL in it, one with a short (<30 clock periods) acquisition time, and, better yet, several, so they can be used to acquire and track synchronous data, and a tracking range and lock range that's programmable, along with a lock detect. Put in the necessary hardware support for HDLC and other serious synchronous comm protocols. Be sure it can operate at speeds equal to the fastest available SRAMs. ARM's already have SDRAM channels and other features that one couldn't hope to exploit adequately with an 805x. A true one-clocker, or one with an average execution rate not slower than one clock per instruction, even multiply and divide, which you could probably only achieve with concurrent or out-of-order execution and single-cycle execution of multi-byte instructions, where every instruction, no matter how long, would take exactly, say, ~8 ns, now that would be handy. In order to make it useful, though, it would need to have the full complement of code space on board, along with the full complement of data space, so external resources would be limited to I/O. One could really do stuff with that. A 1V5 or 1V2 core with 3V3 I/O would be fine. I wouldn't pay to have one made, though. It would have to be off-the-shelf and competitive with comparable ARMs, not ot mention that there would need to be free comprehensive software tools, as there are for the ARM. RE |
Topic | Author | Date |
ARM in an 8051 footprint | 01/01/70 00:00 | |
small niche product | 01/01/70 00:00 | |
Extra signal processing | 01/01/70 00:00 | |
Extra connectivity | 01/01/70 00:00 | |
new external hw => no need for pin-compatibility | 01/01/70 00:00 | |
why interpreter? | 01/01/70 00:00 | |
Nice idea | 01/01/70 00:00 | |
Avoiding PICs | 01/01/70 00:00 | |
OT: harvard memory issues? | 01/01/70 00:00 | |
Harvard memory issues | 01/01/70 00:00 | |
Oh, I see. Thanks for the clarification. | 01/01/70 00:00 | |
Interpreter, or macro assembler | 01/01/70 00:00 | |
Not "trailing edge" | 01/01/70 00:00 | |
What would be the advantage? | 01/01/70 00:00 |