| ??? 10/01/08 11:39 Read: times |
#158727 - Harvard memory issues Responding to: ???'s previous message |
Jan,
The issues I mention is simply the division between code and data space and that they have to be treated differently. For the most part, its not an issue - I've coped with writing PIC assembler! Obviously for 'c' compilers, they need to do tricks in order to marry the harvard architecture to a language that wasn't designed around it - again, not a big issue. In Von-Neuman architecture processors, you don't have to write two routines for the one thing - one for code based vars and another for ram based vars or have 'magic' pointers that carry the address space information around. I'm sure you know all of this. Note that I have done probably 75% of my life's programming on harvard architecture processors! |
| Topic | Author | Date |
| ARM in an 8051 footprint | 01/01/70 00:00 | |
| small niche product | 01/01/70 00:00 | |
| Extra signal processing | 01/01/70 00:00 | |
| Extra connectivity | 01/01/70 00:00 | |
| new external hw => no need for pin-compatibility | 01/01/70 00:00 | |
| why interpreter? | 01/01/70 00:00 | |
| Nice idea | 01/01/70 00:00 | |
| Avoiding PICs | 01/01/70 00:00 | |
| OT: harvard memory issues? | 01/01/70 00:00 | |
| Harvard memory issues | 01/01/70 00:00 | |
| Oh, I see. Thanks for the clarification. | 01/01/70 00:00 | |
| Interpreter, or macro assembler | 01/01/70 00:00 | |
| Not "trailing edge" | 01/01/70 00:00 | |
What would be the advantage? | 01/01/70 00:00 |