??? 06/03/08 13:46 Read: times |
#155445 - I2c 400KHz fall time answers Responding to: ???'s previous message |
Just Giving you feedback.
Here' what the NXP forum finally said The main purpose of the fall time spec is to minimize ringing on the bus. Due to legacy considerations, this value was not specified for 100kHz. As for fast-mode plus, to be backward compatible with fast mode systems, the tf min of 20ns + 0.1Cb should be followed. You will also find that the spec allows for faster fall times if the bus is mixed with Hs-mode devices, where tf min= 10ns for Cb up to 100pF and tf min= 20ns for Cb up to 400pF. The bottom line is that edge rate control should be considered to minimize noise on the bus. Keep in mind for your calculations that Cb is the total capacitance for one bus line in pF, not the total board capacitance. FYI- All NXP I2C-bus drivers have edge rate control to meet the the required fall times. My comments ============ IMPLICATIONS - if you use a quasi bi-direction output or push pull at 400kHz for I2c then you may be in breach of the NXP I2c specifications.... I know that ST on some devices don't have slope control for the I22 fall time... At this stage I haven't seen a problem with faster than spec' fall times. Joe Joe |
Topic | Author | Date |
I2c Specification - Clock Fall time | 01/01/70 00:00 | |
Ringing? | 01/01/70 00:00 | |
Speculation - TA | 01/01/70 00:00 | |
take a look at the transmisison line portions of | 01/01/70 00:00 | |
I2c 400KHz fall time answers | 01/01/70 00:00 | |
On main boards... | 01/01/70 00:00 |