??? 02/26/08 13:28 Read: times |
#151482 - "OCR"ing a Design Responding to: ???'s previous message |
Jan Waclawek said:
Also, does the mega$ pricetag apply also to 1:1 copy of the chip (by selective removal of layers and "OCR"ing)? It is much more difficult to scan chips these days, because the dimensions of key components are less than a wavelength of light. So you can't use normal microscopes. It has to be done with electron microscopes. There are also implant layers that cannot be seen. Implanted layers allow you to insert "gotcha"s. These are structures that look like a logic gate, but are not. Imagine something that looks like an inverter, but whose output is always a logic 1. The copier puts it into their design as an inverter, and that causes the design to fail. Jan Waclawek said:
Below, you mentioned also some checksumming scheme. Would you, as the chip manufacturer, take some guarantee that this step won't leak out the code? I would keep the checksum internal to the chip, and only output a pass-fail signal. |
Topic | Author | Date |
Obtaining maximum code security | 01/01/70 00:00 | |
Worth it ? | 01/01/70 00:00 | |
Protection with Patents | 01/01/70 00:00 | |
the value... again... | 01/01/70 00:00 | |
"OCR"ing a Design | 01/01/70 00:00 | |
It's a brave man | 01/01/70 00:00 | |
Specialist secure micros | 01/01/70 00:00 | |
this is a different form of security | 01/01/70 00:00 | |
Huge NREs? | 01/01/70 00:00 | |
What if you don't bond out nPSEN? | 01/01/70 00:00 | |
why not drop !EA | 01/01/70 00:00 | |
Don't Drop !EA! | 01/01/70 00:00 | |
Couldn\'t you do that in another way | 01/01/70 00:00 | |
Eliminating /EA | 01/01/70 00:00 | |
The value of PSEN | 01/01/70 00:00 | |
not only... | 01/01/70 00:00 | |
Brute-force copying | 01/01/70 00:00 | |
well, maybe... | 01/01/70 00:00 | |
Erase on tamper detect | 01/01/70 00:00 | |
Make the chip hard to access | 01/01/70 00:00 | |
It's quite impractical... | 01/01/70 00:00 | |
few thousand dollars ... Not at all | 01/01/70 00:00 |