| ??? 02/07/07 21:36 Read: times |
#132253 - that's why Responding to: ???'s previous message |
There are certainly subtle differences even in various speed implementation of the SiLabs core. It appears from a quick look to the datasheet, that this (relatively slow) version doesn't have the jump cache (probably as a consequence of a single-byte wide FLASH vs. 4-byte wide at the 100MHz ones).
The max. is actually 25MHz... :-) To keep up with a 100MHz processor using a 25MHz flash, you have to fetch 4 bytes at a time, at 25MHz, there is no need. Erik |
| Topic | Author | Date |
| better version of hyperterminal? | 01/01/70 00:00 | |
| Teraterm | 01/01/70 00:00 | |
| depends | 01/01/70 00:00 | |
| thanks | 01/01/70 00:00 | |
| the simplest case | 01/01/70 00:00 | |
| true... | 01/01/70 00:00 | |
| PuTTY is a (new!) option too | 01/01/70 00:00 | |
| hex/decimal/ASCII? | 01/01/70 00:00 | |
| Industrologic Term232 has some features... | 01/01/70 00:00 | |
| Nice, thanks! | 01/01/70 00:00 | |
| Can't close port? | 01/01/70 00:00 | |
| hackaround | 01/01/70 00:00 | |
report | 01/01/70 00:00 | |
| Nice tip | 01/01/70 00:00 | |
| thanks! | 01/01/70 00:00 | |
| thank you | 01/01/70 00:00 | |
| RealTerm | 01/01/70 00:00 | |
| realterm and 2 stop bits | 01/01/70 00:00 | |
| 2 stop bits... | 01/01/70 00:00 | |
| UART ISR at high baud rates | 01/01/70 00:00 | |
| I'm not sure that's the issue | 01/01/70 00:00 | |
| what derivative? | 01/01/70 00:00 | |
| SiLabs c8051f330 | 01/01/70 00:00 | |
| yeah that fits | 01/01/70 00:00 | |
| what UART | 01/01/70 00:00 | |
| how can I find out? | 01/01/70 00:00 | |
| Have a look! | 01/01/70 00:00 | |
| ok...... | 01/01/70 00:00 | |
| nonono | 01/01/70 00:00 | |
| who cares | 01/01/70 00:00 | |
| I know I am not normal | 01/01/70 00:00 | |
| All SILabs processors are single clockers | 01/01/70 00:00 | |
| there are differences.... | 01/01/70 00:00 | |
| that's why | 01/01/70 00:00 | |
| sure I know why | 01/01/70 00:00 | |
| there are differences.... | 01/01/70 00:00 |