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???
09/07/06 07:53
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  09/07/06 07:54
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 		 #123803 - LFSR
Responding to: ???'s previous message
Jez,
  • I think, you are caught by the very same problem as Jon (in other thread): are you sure you wanted & and not && in "fb=((lfsr & 0x01)^(lfsr & 0x02)^(lfsr & 0x04)^( lfsr & 0x80))"? Yours would shrink down easily to "fb = lfsr & 0x87", wouldn't it? But I haven't seen a LFSR such as that yet; I'd even assume it's not "linear" anymore (due to overflow at addition).
    In the following, I will assume you meant && and assumed that TRUE is equal to 1 in SDCC...
  • is a 8-bit LFSR adequate here (and why did you declare lfsr as 16-bit)?
  • why 0-1-2-7 taps (0x87), this yields only a 217-step sequence; why not 1-2-3-7 which is max=255 step?
  • for Ralph: an 8-bit LFSR in asm can be written as:
    Save This Code
       mov   a,_lfsr
   anl   a,#08Eh   ;get the taps (1-2-3-7)
   mov   c,P       ;P is the parity bit (in fact it performs the xors), P=PSW.0
   mov   a,_lfsr
   rlc   a
   mov   _lfsr,a   ;result in acc

  • for the "core", I am looking at it for some time and it's still sort of a mystery... But I believe there should be some mystery in Christmas, anyway... :-)

JW



List of 11 messages in thread
TopicAuthorDate
Twinkly lights driver.            01/01/70 00:00      
   Amazing...            01/01/70 00:00      
   we only have stupid lights in England            01/01/70 00:00      
   Can you give comparsion            01/01/70 00:00      
      yep,ill do that            01/01/70 00:00      
   actualy I cheated :-)            01/01/70 00:00      
      LFSR            01/01/70 00:00      
   yeah i was thinking about that today            01/01/70 00:00      
   triac control            01/01/70 00:00      
      triac control            01/01/70 00:00      
   You after them girlies again?            01/01/70 00:00      

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