??? 09/07/06 07:21 Read: times |
#123800 - actualy I cheated :-) Responding to: ???'s previous message |
Here is the sdcc assembly code generated using an lfsr as a random number generator.Sooo much easiler than having to write it myself :-)
;-------------------------------------------------------- ; File Created by SDCC : FreeWare ANSI-C Compiler ; Version 2.6.1 #4314 (Aug 1 2006) ; This file generated Thu Sep 07 08:01:23 2006 ;-------------------------------------------------------- .module xmas2 .optsdcc -mmcs51 --model-small ;-------------------------------------------------------- ; Public variables in this module ;-------------------------------------------------------- .globl _main .globl _rand .globl _CY .globl _AC .globl _F0 .globl _RS1 .globl _RS0 .globl _OV .globl _FL .globl _P .globl _PS .globl _PT1 .globl _PX1 .globl _PT0 .globl _PX0 .globl _RD .globl _WR .globl _T1 .globl _T0 .globl _INT1 .globl _INT0 .globl _TXD .globl _RXD .globl _P3_7 .globl _P3_6 .globl _P3_5 .globl _P3_4 .globl _P3_3 .globl _P3_2 .globl _P3_1 .globl _P3_0 .globl _EA .globl _ES .globl _ET1 .globl _EX1 .globl _ET0 .globl _EX0 .globl _P2_7 .globl _P2_6 .globl _P2_5 .globl _P2_4 .globl _P2_3 .globl _P2_2 .globl _P2_1 .globl _P2_0 .globl _SM0 .globl _SM1 .globl _SM2 .globl _REN .globl _TB8 .globl _RB8 .globl _TI .globl _RI .globl _P1_7 .globl _P1_6 .globl _P1_5 .globl _P1_4 .globl _P1_3 .globl _P1_2 .globl _P1_1 .globl _P1_0 .globl _TF1 .globl _TR1 .globl _TF0 .globl _TR0 .globl _IE1 .globl _IT1 .globl _IE0 .globl _IT0 .globl _P0_7 .globl _P0_6 .globl _P0_5 .globl _P0_4 .globl _P0_3 .globl _P0_2 .globl _P0_1 .globl _P0_0 .globl _B .globl _A .globl _ACC .globl _PSW .globl _IP .globl _P3 .globl _IE .globl _P2 .globl _SBUF .globl _SCON .globl _P1 .globl _TH1 .globl _TH0 .globl _TL1 .globl _TL0 .globl _TMOD .globl _TCON .globl _PCON .globl _DPH .globl _DPL .globl _SP .globl _P0 .globl _lfsr .globl _fb ;-------------------------------------------------------- ; special function registers ;-------------------------------------------------------- .area RSEG (DATA) _P0 = 0x0080 _SP = 0x0081 _DPL = 0x0082 _DPH = 0x0083 _PCON = 0x0087 _TCON = 0x0088 _TMOD = 0x0089 _TL0 = 0x008a _TL1 = 0x008b _TH0 = 0x008c _TH1 = 0x008d _P1 = 0x0090 _SCON = 0x0098 _SBUF = 0x0099 _P2 = 0x00a0 _IE = 0x00a8 _P3 = 0x00b0 _IP = 0x00b8 _PSW = 0x00d0 _ACC = 0x00e0 _A = 0x00e0 _B = 0x00f0 ;-------------------------------------------------------- ; special function bits ;-------------------------------------------------------- .area RSEG (DATA) _P0_0 = 0x0080 _P0_1 = 0x0081 _P0_2 = 0x0082 _P0_3 = 0x0083 _P0_4 = 0x0084 _P0_5 = 0x0085 _P0_6 = 0x0086 _P0_7 = 0x0087 _IT0 = 0x0088 _IE0 = 0x0089 _IT1 = 0x008a _IE1 = 0x008b _TR0 = 0x008c _TF0 = 0x008d _TR1 = 0x008e _TF1 = 0x008f _P1_0 = 0x0090 _P1_1 = 0x0091 _P1_2 = 0x0092 _P1_3 = 0x0093 _P1_4 = 0x0094 _P1_5 = 0x0095 _P1_6 = 0x0096 _P1_7 = 0x0097 _RI = 0x0098 _TI = 0x0099 _RB8 = 0x009a _TB8 = 0x009b _REN = 0x009c _SM2 = 0x009d _SM1 = 0x009e _SM0 = 0x009f _P2_0 = 0x00a0 _P2_1 = 0x00a1 _P2_2 = 0x00a2 _P2_3 = 0x00a3 _P2_4 = 0x00a4 _P2_5 = 0x00a5 _P2_6 = 0x00a6 _P2_7 = 0x00a7 _EX0 = 0x00a8 _ET0 = 0x00a9 _EX1 = 0x00aa _ET1 = 0x00ab _ES = 0x00ac _EA = 0x00af _P3_0 = 0x00b0 _P3_1 = 0x00b1 _P3_2 = 0x00b2 _P3_3 = 0x00b3 _P3_4 = 0x00b4 _P3_5 = 0x00b5 _P3_6 = 0x00b6 _P3_7 = 0x00b7 _RXD = 0x00b0 _TXD = 0x00b1 _INT0 = 0x00b2 _INT1 = 0x00b3 _T0 = 0x00b4 _T1 = 0x00b5 _WR = 0x00b6 _RD = 0x00b7 _PX0 = 0x00b8 _PT0 = 0x00b9 _PX1 = 0x00ba _PT1 = 0x00bb _PS = 0x00bc _P = 0x00d0 _FL = 0x00d1 _OV = 0x00d2 _RS0 = 0x00d3 _RS1 = 0x00d4 _F0 = 0x00d5 _AC = 0x00d6 _CY = 0x00d7 ;-------------------------------------------------------- ; overlayable register banks ;-------------------------------------------------------- .area REG_BANK_0 (REL,OVR,DATA) .ds 8 ;-------------------------------------------------------- ; internal ram data ;-------------------------------------------------------- .area DSEG (DATA) _fb:: .ds 2 _lfsr:: .ds 2 ;-------------------------------------------------------- ; overlayable items in internal ram ;-------------------------------------------------------- .area OSEG (OVR,DATA) ;-------------------------------------------------------- ; Stack segment in internal ram ;-------------------------------------------------------- .area SSEG (DATA) __start__stack: .ds 1 ;-------------------------------------------------------- ; indirectly addressable internal ram data ;-------------------------------------------------------- .area ISEG (DATA) ;-------------------------------------------------------- ; bit data ;-------------------------------------------------------- .area BSEG (BIT) ;-------------------------------------------------------- ; paged external ram data ;-------------------------------------------------------- .area PSEG (PAG,XDATA) ;-------------------------------------------------------- ; external ram data ;-------------------------------------------------------- .area XSEG (XDATA) ;-------------------------------------------------------- ; external initialized ram data ;-------------------------------------------------------- .area XISEG (XDATA) .area HOME (CODE) .area GSINIT0 (CODE) .area GSINIT1 (CODE) .area GSINIT2 (CODE) .area GSINIT3 (CODE) .area GSINIT4 (CODE) .area GSINIT5 (CODE) .area GSINIT (CODE) .area GSFINAL (CODE) .area CSEG (CODE) ;-------------------------------------------------------- ; interrupt vector ;-------------------------------------------------------- .area HOME (CODE) __interrupt_vect: ljmp __sdcc_gsinit_startup ;-------------------------------------------------------- ; global & static initialisations ;-------------------------------------------------------- .area HOME (CODE) .area GSINIT (CODE) .area GSFINAL (CODE) .area GSINIT (CODE) .globl __sdcc_gsinit_startup .globl __sdcc_program_startup .globl __start__stack .globl __mcs51_genXINIT .globl __mcs51_genXRAMCLEAR .globl __mcs51_genRAMCLEAR ; xmas2.c:11: unsigned int fb,lfsr=0x0081; mov _lfsr,#0x81 clr a mov (_lfsr + 1),a .area GSFINAL (CODE) ljmp __sdcc_program_startup ;-------------------------------------------------------- ; Home ;-------------------------------------------------------- .area HOME (CODE) .area CSEG (CODE) __sdcc_program_startup: lcall _main ; return from main will lock up sjmp . ;-------------------------------------------------------- ; code ;-------------------------------------------------------- .area CSEG (CODE) ;------------------------------------------------------------ ;Allocation info for local variables in function 'rand' ;------------------------------------------------------------ ;------------------------------------------------------------ ; xmas2.c:14: unsigned char rand(void) ; ----------------------------------------- ; function rand ; ----------------------------------------- _rand: ar2 = 0x02 ar3 = 0x03 ar4 = 0x04 ar5 = 0x05 ar6 = 0x06 ar7 = 0x07 ar0 = 0x00 ar1 = 0x01 ; xmas2.c:16: fb=((lfsr & 0x01)^(lfsr & 0x02)^(lfsr & 0x04)^( lfsr & 0x80)); mov a,#0x01 anl a,_lfsr mov r2,a mov r3,#0x00 mov a,#0x02 anl a,_lfsr mov r4,a mov r5,#0x00 xrl ar2,a mov a,r5 xrl ar3,a mov a,#0x04 anl a,_lfsr mov r4,a mov r5,#0x00 xrl ar2,a mov a,r5 xrl ar3,a mov a,#0x80 anl a,_lfsr mov r4,a mov r5,#0x00 xrl a,r2 mov _fb,a mov a,r5 xrl a,r3 mov (_fb + 1),a ; xmas2.c:18: lfsr=(lfsr<<1)+fb; mov a,_lfsr add a,_lfsr mov r2,a mov a,(_lfsr + 1) rlc a mov r3,a mov a,_fb add a,r2 mov _lfsr,a mov a,(_fb + 1) addc a,r3 mov (_lfsr + 1),a ; xmas2.c:19: return(unsigned char)(lfsr & 0x0F); mov a,#0x0F anl a,_lfsr mov r2,a mov r3,#0x00 mov dpl,r2 ret ;------------------------------------------------------------ ;Allocation info for local variables in function 'main' ;------------------------------------------------------------ ;step Allocated to registers r2 ;step2 Allocated to registers r6 ;reg1 Allocated to registers r5 ;reg2 Allocated to registers r6 ;n Allocated to registers r3 ;up Allocated to registers r4 ;cntr Allocated to registers r7 ;------------------------------------------------------------ ; xmas2.c:23: int main(void) ; ----------------------------------------- ; function main ; ----------------------------------------- _main: ; xmas2.c:26: unsigned char step=6, step2,reg1, reg2, n=0, up=1, cntr; mov r2,#0x06 mov r3,#0x00 mov r4,#0x01 ; xmas2.c:30: reg1= rand() ; // The first random number push ar2 push ar3 push ar4 lcall _rand mov r5,dpl pop ar4 pop ar3 pop ar2 ; xmas2.c:32: while (1) 00109$: ; xmas2.c:34: reg2= rand() ; // The second random number push ar2 push ar3 push ar4 push ar5 lcall _rand mov r6,dpl pop ar5 pop ar4 pop ar3 pop ar2 ; xmas2.c:35: cntr= TOTAL; // Start with fresh counter mov r7,#0xFC ; xmas2.c:37: while (1) 00106$: ; xmas2.c:39: n+=(up)?1:-1; ; genIfx mov a,r4 jz 00113$ mov r0,#0x01 sjmp 00114$ 00113$: mov r0,#0xFF 00114$: mov a,r0 add a,r3 mov r3,a ; xmas2.c:40: P1=(n>cntr)?reg2:reg1; clr c mov a,r7 subb a,r3 jnc 00115$ mov ar0,r6 sjmp 00116$ 00115$: mov ar0,r5 00116$: mov _P1,r0 ; xmas2.c:41: up=(n==255)?0:((n==0)?1:up); cjne r3,#0xFF,00117$ mov r0,#0x00 sjmp 00118$ 00117$: mov a,r3 cjne a,#0x01,00136$ 00136$: clr a rlc a mov r1,a jz 00119$ mov r1,#0x01 sjmp 00120$ 00119$: mov ar1,r4 00120$: mov ar0,r1 00118$: mov ar4,r0 ; xmas2.c:42: if (cntr==0) break; mov a,r7 jz 00107$ xmas2.c:43: if (n==0) cntr-= step; mov a,r3 jnz 00106$ mov a,r7 clr c subb a,r2 mov r7,a sjmp 00106$ 00107$: ; xmas2.c:46: reg1=reg2; mov ar5,r6 ; xmas2.c:47: step2=rand(); push ar2 push ar3 push ar4 push ar5 lcall _rand mov r6,dpl pop ar5 pop ar4 pop ar3 pop ar2 ; xmas2.c:48: step=((TOTAL%step2)==0)?step2:step; mov b,r6 mov a,#0xFC div ab mov a,b mov r7,a cjne a,#0x01,00140$ 00140$: clr a rlc a mov r7,a jz 00121$ sjmp 00122$ 00121$: mov ar6,r2 00122$: mov ar2,r6 ljmp 00109$ ; .area CSEG (CODE) .area CONST (CODE) .area XINIT (CODE) |
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