It is not necessarily "the same time". The following may occur: let's have interrupts A, B and C, with the same *user assigned* priority (and *polling* priority in this order, A is highest); and let have interrupts P and Q of higher *user assigned* prority (their mutual *polling* priority is P>Q but it is irrelevant, how do they relate to *polling priorities* of A, B and C).

During ISR P, all triggers firing interrupts A, B and C occur (edge on pin for external interrupt occurs, character arrives to serial, timer overflows etc.). They cannot interrupt ISR of P, as they have lower *user assigned* priority; they wait until P ends. At that moment (more precisely, after one instruction of the originally interrupted level is executed), the interrupt processing machine takes a look at its pending interrupts, and based on the highest *polling* priority decides, that ISR A is going to be executed first.

Similarly, let's assume, in "main", interrupts are disabled for some time, during which triggers for all 5 interrupts occur. When the interrupts are re-enabled, the higher *assigned* priority interrupts are processed first, namely P and Q. Again, based on their *polling* priority, ISR P is executed first, ISR Q second, ISR A third, etc. (provided no other interrupts trigger in that time).

JW