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08/08/10 17:17
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#177887 - Pulse degradation
When developing prototype systems with MCUs I am facing a tough predicament. More so when most of the current generation MCUs are SMD types. Things were far easy when using DIP versions but with high density and mixed signal MCUs like the Silabs F120, this no longer is possible generally and I need to get a PCB designed around the SMD variety. Cost is still an issue in my place for SMD pcb design/assembly and hence when the proto is the end product, I tend to use a standard Development Kit from SiLabs. It is economical and coming from Silabs it is designed well.

Question is when running the MCU at clock speeds like 49Mhz, what kind of leeway does one have to extend the ports for interfacing to other PCBs that have keypad / LCD etc. If I take the F120 DK as an example, it has all the ports brought out to 10pin IDC connectors. It is very easy to use a FRC cable and socket for interfacing. So how long can this FRC cable be, before the signals start loosing thier sharp edges to the extent of loosing functionality ? Of course the SiLabs kits also provide a PCB edge connector but using that makes the whole assembly quite long !

Any tips on the interfacing aspect and traps to watch out ?

Thanks

Raghu

List of 15 messages in thread
TopicAuthorDate
Pulse degradation            01/01/70 00:00      
   For many purposes, slow flanks are not a problem            01/01/70 00:00      
      Slew-rate limiting            01/01/70 00:00      
   Extending SiLabs TestBoard I/O            01/01/70 00:00      
      Solved..            01/01/70 00:00      
         piggy back PCB?            01/01/70 00:00      
   maybe not totally related            01/01/70 00:00      
      Quite related and valuble            01/01/70 00:00      
         Brief Heavy or Not            01/01/70 00:00      
   Series resistors will do the trick!            01/01/70 00:00      
      Pro vs Amatuers            01/01/70 00:00      
         I'd like to rephrase            01/01/70 00:00      
            Theory first, then lots of testing            01/01/70 00:00      
               Environment...            01/01/70 00:00      
                  ! Amused            01/01/70 00:00      

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