??? 04/18/10 13:03 Read: times |
#175107 - Use what you pay for... Responding to: ???'s previous message |
Raghu:
When you purchase a microcontroller that is capable of operating at clocking rates of a given level it is often needed to run at those rates to get the processing performance needed for a given application. You are right in that the higher performance part may not be necessary for all applications but then you have paid a premium for the parts. Keep in mind too that an app note may describe only a subset of the development work done by the application engineer. They may be also adapting a particular development setup across more than one investigation and one of those could very well be one to demonstrate using the PLL :-). There could be other considerations as well regarding the selection of MCU operating frequency. Certain frequencies may be easier to filter out of the analogue section of a specific PC board design. Maybe there is a desire to either avoid or achieve some type of sync relationship between the input analogue signaling and the MCU instruction clocking. Last comment I could make is that there has been discussion in some MCU forums that higher performance analogue applications may actually benefit from either slowing down or halting the MCU during sensitive A/D measurements. I recall to have seen at least one instance of a design where the MCU derived its operating clock via a PLL from a 32.7kHz watch type crystal. During the A/D events the PLL would be shutdown and let the CPU and A/D systems operate at 32.7kHz for the duration of the sampling and conversion process. Michael Karas |
Topic | Author | Date |
Benefit of a higher SYSCLK ? | 01/01/70 00:00 | |
Depends | 01/01/70 00:00 | |
Use what you pay for... | 01/01/70 00:00 | |
Quite common to halt/sleep core during ADC capture | 01/01/70 00:00 | |
Seems to be a demo of various items... | 01/01/70 00:00 | |
Another Strong Reason...![]() | 01/01/70 00:00 | |
if you set it high enough ... | 01/01/70 00:00 |