| ??? 03/11/10 17:51 Read: times |
#174003 - psec Responding to: ???'s previous message |
Jez Smith said:
Its no more than a couple of hours work to code a ToF counter and getting 100ns resolution is do-able in a pretty bog standard CPLD.
I got involved with Steve doing sort of ToF with 10ns resolution, Would these pSec interval devices be even better ? The project is still on a back burner. Steve |
| Topic | Author | Date |
| Counter IC for Ultrasonic flow meter | 01/01/70 00:00 | |
| specialized circuits | 01/01/70 00:00 | |
| FPGA TDC | 01/01/70 00:00 | |
| FPGA difficult | 01/01/70 00:00 | |
| ACAM TDC-GPX ? | 01/01/70 00:00 | |
| Interesting | 01/01/70 00:00 | |
| Mayabe a CPLD would be easier | 01/01/70 00:00 | |
| CPLD | 01/01/70 00:00 | |
| GP2 | 01/01/70 00:00 | |
| I like those GP2 devices | 01/01/70 00:00 | |
Resolution | 01/01/70 00:00 | |
| Not too difficult | 01/01/70 00:00 | |
| psec | 01/01/70 00:00 | |
| there is no reason why not | 01/01/70 00:00 | |
| Silicon delay line | 01/01/70 00:00 | |
| Digital Delay Lines | 01/01/70 00:00 |