Another example of where you would not want to be clearing all of RAM is when you need to have an active code algorithm running within the fewest possible number of cycles after reset completes. There are a list of considerations to make when trying to implement this "fast on and active" mode of operation.

Utilize an MCU with a specified short spec reset pulse width.

Build your power-on rest circuit in a way that produces an accurate pulse that meets power stability requirements but at same time is just over the minimum MCU pulse width requirement.

Select a timing generator for the clock that has no start up delay. This may be an MCU that has an in-built R/C type oscillator or one could use an external oscillator of similar design such as the Linear Technology LT6900.

If using an external oscillator make sure that the MCU does not impose some type of in-built extension of reset intended to cover the startup time for a crystal oscillator. Some MCUs may actually have this characteristic "programmable" via oscillator type selection soft straps.

Change the default behavior of the startup and/or init modules to eliminate the initial clearing of RAM.

Carefully comb through all of your code to make sure that there are no assumptions anywhere regarding any default expectations for variables being set at zero.

Michael Karas