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???
01/15/10 14:00
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#172488 - illustration of edge difference?
Responding to: ???'s previous message
This is an illustration, not a discussion of a SILabs chip

if you look at the datasheet for the SILabs f12x/f13x you will see


Bit 5: CKPHA: SPI0 Clock Phase.
This bit controls the SPI0 clock phase.
0: Data centered on first edge of SCK period.*
1: Data centered on second edge of SCK period.*
Bit 4: CKPOL: SPI0 Clock Polarity.
This bit controls the SPI0 clock polarity.
0: SCK line low in idle state.
1: SCK line high in idle state.

This is an illustration of how varied the SPI can be and as a simulator SIMULATES (with the same satisfaction as simulated sex), you have no idea if your setup match the clock phase and polarity.

Erik

List of 30 messages in thread
TopicAuthorDate
Simulation vs. Embedded Discrepancy            01/01/70 00:00      
   Hardware fault?            01/01/70 00:00      
      Responding to: Andy Neil's previous message            01/01/70 00:00      
   illustration of edge difference?            01/01/70 00:00      
      SPI Phase/Polarity            01/01/70 00:00      
         address instead of value            01/01/70 00:00      
            Doesn't seem coincidental            01/01/70 00:00      
               MOVX command fails            01/01/70 00:00      
                  Definitely sounds like a hardware fault!            01/01/70 00:00      
                  Have you tried doing this in ASM?            01/01/70 00:00      
                     The loop in ASM            01/01/70 00:00      
                        I think...            01/01/70 00:00      
                        Sounds like hardware again            01/01/70 00:00      
                           If this were reduced to the essentials ...            01/01/70 00:00      
                              Oh Richard            01/01/70 00:00      
                        What I was after ...            01/01/70 00:00      
                           Reducing to Essentials            01/01/70 00:00      
                              RE: Magic Switch On The Compiler            01/01/70 00:00      
                                 Emulator trace            01/01/70 00:00      
                                    Yes            01/01/70 00:00      
                                       SOLVED            01/01/70 00:00      
                                          A bit ocnfused            01/01/70 00:00      
                                             Emulator and AUXR            01/01/70 00:00      
                                                Things do tend to work best...            01/01/70 00:00      
   one guess with a question            01/01/70 00:00      
      Memory has plenty of gaps            01/01/70 00:00      
         That doesn't make sense!            01/01/70 00:00      
            Sloppy language on my part            01/01/70 00:00      
      Am I missing something            01/01/70 00:00      
      questions/request            01/01/70 00:00      

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