| ??? 11/01/09 06:55 Read: times |
#170305 - Reason for off-chip PHY Responding to: ???'s previous message |
Jan Waclawek said:
I suspect one of the deliberately undocumented TEST pins might make the chip to bypass the internal PHY, outputting MII onto the general-purpose IO pins perhaps. Not that it is very useful, most probably used in factory testing only. I s'pose a user might have specific requirements for a PHY that the on-chip one can't reach? Or one might want to use a non-ethernet PHY; eg, WiFi... |
| Topic | Author | Date |
| Fancy a '51 with TCP/IP? | 01/01/70 00:00 | |
| Dead ? | 01/01/70 00:00 | |
| Shame about the support? | 01/01/70 00:00 | |
| waiting | 01/01/70 00:00 | |
| DIY? | 01/01/70 00:00 | |
| it's still more | 01/01/70 00:00 | |
| Cortex-M3 comparison | 01/01/70 00:00 | |
| PHY on-chip | 01/01/70 00:00 | |
| it saves I/O's! | 01/01/70 00:00 | |
| RMII | 01/01/70 00:00 | |
| to PHY or not to PHY | 01/01/70 00:00 | |
| It's not that easy to damage the PHY | 01/01/70 00:00 | |
| Reason for off-chip PHY | 01/01/70 00:00 | |
| different PHY? | 01/01/70 00:00 | |
| Wisdom of youth | 01/01/70 00:00 | |
Wiznet | 01/01/70 00:00 |